The present invention relates to systems and methods for managing flash memories and, more particularly, to a method, of managing a multi-level cell flash memory, that is resistant to data corruption when power is interrupted unexpectedly.
Flash memory is an electronic non-volatile storage device that can be electrically erased and reprogrammed. The non-volatile characteristic of the flash memory device can allow the memory device to maintain the stored data even after power to the device is removed. Flash memories can be used in many electronic products such as computers, digital cameras, and mobile phones. Flash memory can be more popular than hard disks, especially for small memory capacity, due to its fast reading access and mechanical shock resistance.
Flash memory was developed from EEPROM (electrically erasable programmable read-only memory), with the internal characteristics of the individual flash memory cells exhibit characteristics similar to logic gates, such as NAND or NOR gates. Although flash memory is technically a type of EEPROM, EEPROM is generally used to refer to memory that can be erasable in bytes, while flash memory, e.g., NAND type flash memory, can be erased and written in blocks and pages, respectively, which are generally much larger than the bytes used in EEPROM erasing operation. Because erase cycles are slow, the large block sizes used in NAND type flash memory erasing can provide a significant speed advantage over EEPROM when writing large amounts of data. In addition, the low cost of flash memory has made flash memory the dominant memory type for large non-volatile, solid state storage.
Flash memory can experience problems due to power interruption while programming the memory cells, especially for multi-level cell (MLC) NAND gate type flash memories. Thus there is a need for a flash management system capable of dealing with power interruptions to MLC NAND flash media.